US: $138000 - $197000 (USD) + 15% bonus target + equity + benefits
Learn more about benefits at Google.
Responsibilities
- Create the first Google Central Processing Unit (CPU) for processor design team.
- Define floating point data paths implementing the IEEE 754 standard while achieving performance, clock and low power goals.
- Implement integer single instruction, multiple data (SIMD) and floating point SIMD data paths focusing on power/performance.
- Work with architecture teams and other micro architects to define high performance floating point issue, register, bypass and retirement logic to support a complex FP-SIMD instruction set architecture (ISA).
Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
- 4 years of experience with IEEE 754 datapath implementations including design, verification and physical implementation issues.
- Experience with Floating Point (FP) and SIMD ISA.
Preferred qualifications:
- Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
- 4 years of experience in high-performance floating point datapath design.
- Understanding of design techniques to minimize data path power usage.
- Understanding of data path design techniques to achieve high clock rates.