US: $192000 - $278000 (USD) + 20% bonus target + equity + benefits
Learn more about benefits at Google.
Responsibilities
- Develop and implement advanced low power design methodologies for CPU architectures.
- Perform detailed power analysis, estimation, and optimization across various design stages.
- Collaborate with RTL design, verification, and physical design teams to integrate power-saving features.
- Drive the adoption of innovative power reduction techniques and tools.
- Contribute to the definition and validation of power management specifications.
Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- 10 years of experience in CPU low power design and optimization.
- Experience with low-power design (e.g., dynamic and leakage, power estimation, and optimization), data analytics, and profiling.
- Experience in flow automation (Python, C, C++).
Preferred qualifications:
- Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
- Experience in RTL design and low-power design techniques.
- Experience with power management and DVFS.
- Experience with CPU benchmarking, performance analysis, and industry study.
- Experience with vendor tools such as PTPX, Ansys Power Artist, and Synopsys Prime Power RTL.
- Knowledge of CPU microarchitecture.